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@ -327,12 +327,12 @@ __STATIC_INLINE void PORT_JTAG_SETUP (void) { |
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GPIOA->CFGLR|=0x08<<(4*3); |
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GPIOA->BSHR=1<<3; |
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// if (DIR_IsEN == 1)
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// {
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// GPIOA->CFGLR&=~(0x0F<<(4*5));//DIR,GPIOA5
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// GPIOA->CFGLR|=0x03<<(4*5);
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// GPIOA->BCR=1<<5;
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// }
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if (DIR_IsEN == 1) |
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{ |
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GPIOA->CFGLR&=~(0x0F<<(4*5));//DIR,GPIOA5
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GPIOA->CFGLR|=0x03<<(4*5); |
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GPIOA->BCR=1<<5; |
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} |
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} |
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/** Setup SWD I/O pins: SWCLK, SWDIO, and nRESET.
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@ -355,12 +355,12 @@ __STATIC_INLINE void PORT_SWD_SETUP (void) { |
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GPIOA->CFGLR|=0x03<<(4*4); |
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GPIOA->BSHR=1<<4; |
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// if (DIR_IsEN == 1)
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// {
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// GPIOA->CFGLR&=~(0x0F<<(4*5));//DIR,GPIOA5
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// GPIOA->CFGLR|=0x03<<(4*5);
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// GPIOA->BCR=1<<5;
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// }
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if (DIR_IsEN == 1) |
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{ |
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GPIOA->CFGLR&=~(0x0F<<(4*5));//DIR,GPIOA5
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GPIOA->CFGLR|=0x03<<(4*5); |
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GPIOA->BCR=1<<5; |
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} |
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} |
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/** Disable JTAG/SWD I/O Pins.
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@ -371,31 +371,31 @@ __STATIC_INLINE void PORT_OFF (void) { |
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RCC->APB2PCENR|=RCC_APB2Periph_GPIOA; |
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GPIOA->CFGHR&=~(0x0F<<(4*3));//CLK,GPIOA11
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// GPIOA->CFGHR|=0x08<<(4*3);
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// GPIOA->BSHR=1<<11;
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GPIOA->CFGHR|=0x08<<(4*3); |
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GPIOA->BSHR=1<<11; |
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GPIOA->CFGHR&=~(0x0F<<(4*2));//DIO,GPIOA10
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// GPIOA->CFGHR|=0x08<<(4*2);
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// GPIOA->BSHR=1<<10;
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GPIOA->CFGHR|=0x08<<(4*2); |
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GPIOA->BSHR=1<<10; |
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GPIOA->CFGLR&=~(0x0F<<(4*4));//RST,GPIOA4
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// GPIOA->CFGLR|=0x08<<(4*4);
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// GPIOA->BSHR=1<<4;
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GPIOA->CFGLR|=0x08<<(4*4); |
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GPIOA->BSHR=1<<4; |
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GPIOA->CFGLR&=~(0x0F<<(4*2));//TDI,GPIOA2
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// GPIOA->CFGLR|=0x08<<(4*2);
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// GPIOA->BSHR=1<<2;
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GPIOA->CFGLR|=0x08<<(4*2); |
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GPIOA->BSHR=1<<2; |
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GPIOA->CFGLR&=~(0x0F<<(4*3));//TDO,GPIOA3
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// GPIOA->CFGLR|=0x08<<(4*3);
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// GPIOA->BSHR=1<<3;
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GPIOA->CFGLR|=0x08<<(4*3); |
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GPIOA->BSHR=1<<3; |
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// if (DIR_IsEN == 1)
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// {
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// GPIOA->CFGLR&=~(0x0F<<(4*5));//DIR,GPIOA5
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// GPIOA->CFGLR|=0x08<<(4*5);
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// GPIOA->BSHR=1<<5;
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// }
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if (DIR_IsEN == 1) |
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{ |
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GPIOA->CFGLR&=~(0x0F<<(4*5));//DIR,GPIOA5
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GPIOA->CFGLR|=0x08<<(4*5); |
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GPIOA->BSHR=1<<5; |
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} |
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} |
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// SWCLK/TCK I/O pin -------------------------------------
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@ -477,10 +477,10 @@ __STATIC_FORCEINLINE void PIN_SWDIO_OUT_ENABLE (void) { |
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GPIOA->CFGHR&=~(0x0F<<(4*2));//DIO,GPIOA10
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GPIOA->CFGHR|=0x03<<(4*2); |
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// if (DIR_IsEN == 1)
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// {
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// GPIOA->BCR=1<<5;//DIR,GPIOA5
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// }
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if (DIR_IsEN == 1) |
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{ |
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GPIOA->BCR=1<<5;//DIR,GPIOA5
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} |
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} |
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/** SWDIO I/O pin: Switch to Input mode (used in SWD mode only).
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@ -491,10 +491,10 @@ __STATIC_FORCEINLINE void PIN_SWDIO_OUT_DISABLE (void) { |
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GPIOA->CFGHR&=~(0x0F<<(4*2));//DIO,GPIOA10
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GPIOA->CFGHR|=0x08<<(4*2); |
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// if (DIR_IsEN == 1)
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// {
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// GPIOA->BSHR=1<<5;//DIR,GPIOA5
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// }
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if (DIR_IsEN == 1) |
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{ |
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GPIOA->BSHR=1<<5;//DIR,GPIOA5
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} |
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} |
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