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XIVN1987
2023-01-31 01:14:03 +08:00
parent 040514f9fa
commit 0b41c31d56
6 changed files with 20 additions and 20 deletions
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AT32F425/DAPLink.uvoptx
+1 -1
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@@ -282,7 +282,7 @@
<Group> <Group>
<GroupName>DAP</GroupName> <GroupName>DAP</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
AT32F425/src/DAP_config.h
+3 -3
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@@ -78,12 +78,12 @@ DAP Hardware I/O Pin Access Functions
#define SWDIO_PIN_INDEX 0 #define SWDIO_PIN_INDEX 0
#define SWD_RST_PORT GPIOA #define SWD_RST_PORT GPIOA
#define SWD_RST_PIN GPIO_PINS_7 #define SWD_RST_PIN GPIO_PINS_4
#define LED_CONNECTED_PORT GPIOA #define LED_CONNECTED_PORT GPIOA
#define LED_CONNECTED_PIN GPIO_PINS_4 #define LED_CONNECTED_PIN GPIO_PINS_5
#define LED_RUNNING_PORT GPIOA #define LED_RUNNING_PORT GPIOA
#define LED_RUNNING_PIN GPIO_PINS_4 #define LED_RUNNING_PIN GPIO_PINS_5
/** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET. /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET.
CH32V203/src/DAP_config.h
+3 -3
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@@ -78,12 +78,12 @@ DAP Hardware I/O Pin Access Functions
#define SWDIO_PIN_INDEX 0 #define SWDIO_PIN_INDEX 0
#define SWD_RST_PORT GPIOA #define SWD_RST_PORT GPIOA
#define SWD_RST_PIN GPIO_Pin_7 #define SWD_RST_PIN GPIO_Pin_4
#define LED_CONNECTED_PORT GPIOA #define LED_CONNECTED_PORT GPIOA
#define LED_CONNECTED_PIN GPIO_Pin_4 #define LED_CONNECTED_PIN GPIO_Pin_5
#define LED_RUNNING_PORT GPIOA #define LED_RUNNING_PORT GPIOA
#define LED_RUNNING_PIN GPIO_Pin_4 #define LED_RUNNING_PIN GPIO_Pin_5
/** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET. /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET.
CH32V305/src/DAP_config.h
+3 -3
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@@ -78,12 +78,12 @@ DAP Hardware I/O Pin Access Functions
#define SWDIO_PIN_INDEX 0 #define SWDIO_PIN_INDEX 0
#define SWD_RST_PORT GPIOA #define SWD_RST_PORT GPIOA
#define SWD_RST_PIN GPIO_Pin_7 #define SWD_RST_PIN GPIO_Pin_4
#define LED_CONNECTED_PORT GPIOA #define LED_CONNECTED_PORT GPIOA
#define LED_CONNECTED_PIN GPIO_Pin_4 #define LED_CONNECTED_PIN GPIO_Pin_5
#define LED_RUNNING_PORT GPIOA #define LED_RUNNING_PORT GPIOA
#define LED_RUNNING_PIN GPIO_Pin_4 #define LED_RUNNING_PIN GPIO_Pin_5
/** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET. /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET.
M482/DAPLink.uvoptx
+4 -4
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@@ -269,7 +269,7 @@
<Group> <Group>
<GroupName>DAP</GroupName> <GroupName>DAP</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@@ -313,7 +313,7 @@
<Group> <Group>
<GroupName>SWD_host</GroupName> <GroupName>SWD_host</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@@ -333,7 +333,7 @@
<Group> <Group>
<GroupName>CSL/StdPD</GroupName> <GroupName>CSL/StdPD</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@@ -425,7 +425,7 @@
<Group> <Group>
<GroupName>CSL/CMSIS</GroupName> <GroupName>CSL/CMSIS</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
README.md
+6 -6
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@@ -9,10 +9,10 @@ DAPLink (CMSIS-DAP) based on Artery AT32F425 (support crystal-less USB), support
| :---- | :---- | | :---- | :---- |
| SWD_CLK | PA.1 | | SWD_CLK | PA.1 |
| SWD_DIO | PA.0 | | SWD_DIO | PA.0 |
| SWD_RST | PA.7 | | SWD_RST | PA.4 |
| CDC_TXD | PA.2 | | CDC_TXD | PA.2 |
| CDC_RXD | PA.3 | | CDC_RXD | PA.3 |
| LED_SWD | PA.4 | | LED_SWD | PA.5 |
## DAPLink-CH32V203 ## DAPLink-CH32V203
DAPLink (CMSIS-DAP) based on WCH CH32V203 (support crystal-less USB), supports SWD and CDC. DAPLink (CMSIS-DAP) based on WCH CH32V203 (support crystal-less USB), supports SWD and CDC.
@@ -22,10 +22,10 @@ DAPLink (CMSIS-DAP) based on WCH CH32V203 (support crystal-less USB), supports S
| :---- | :---- | | :---- | :---- |
| SWD_CLK | PA.1 | | SWD_CLK | PA.1 |
| SWD_DIO | PA.0 | | SWD_DIO | PA.0 |
| SWD_RST | PA.7 | | SWD_RST | PA.4 |
| CDC_TXD | PA.2 | | CDC_TXD | PA.2 |
| CDC_RXD | PA.3 | | CDC_RXD | PA.3 |
| LED_SWD | PA.4 | | LED_SWD | PA.5 |
## DAPLink-CH32V305 ## DAPLink-CH32V305
DAPLink (CMSIS-DAP) based on WCH CH32V305 (High Speed USB with on-chip PHY), supports SWD and CDC. DAPLink (CMSIS-DAP) based on WCH CH32V305 (High Speed USB with on-chip PHY), supports SWD and CDC.
@@ -35,10 +35,10 @@ DAPLink (CMSIS-DAP) based on WCH CH32V305 (High Speed USB with on-chip PHY), sup
| :---- | :---- | | :---- | :---- |
| SWD_CLK | PA.1 | | SWD_CLK | PA.1 |
| SWD_DIO | PA.0 | | SWD_DIO | PA.0 |
| SWD_RST | PA.7 | | SWD_RST | PA.4 |
| CDC_TXD | PA.2 | | CDC_TXD | PA.2 |
| CDC_RXD | PA.3 | | CDC_RXD | PA.3 |
| LED_SWD | PA.4 | | LED_SWD | PA.5 |
## DAPLink-M482 ## DAPLink-M482
DAPLink (CMSIS-DAP) based on Nuvoton M482, supports SWD and CDC. DAPLink (CMSIS-DAP) based on Nuvoton M482, supports SWD and CDC.