From 0b41c31d56ddba47b6c356071183f0eb74cec422 Mon Sep 17 00:00:00 2001
From: XIVN1987 <XIVN1987@163.com>
Date: Tue, 31 Jan 2023 01:14:03 +0800
Subject: [PATCH] change pin

---
 AT32F425/DAPLink.uvoptx   |  2 +-
 AT32F425/src/DAP_config.h |  6 +++---
 CH32V203/src/DAP_config.h |  6 +++---
 CH32V305/src/DAP_config.h |  6 +++---
 M482/DAPLink.uvoptx       |  8 ++++----
 README.md                 | 12 ++++++------
 6 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/AT32F425/DAPLink.uvoptx b/AT32F425/DAPLink.uvoptx
index 9691fee..6d5547f 100644
--- a/AT32F425/DAPLink.uvoptx
+++ b/AT32F425/DAPLink.uvoptx
@@ -282,7 +282,7 @@
 
   <Group>
     <GroupName>DAP</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
diff --git a/AT32F425/src/DAP_config.h b/AT32F425/src/DAP_config.h
index 59777af..5596e62 100644
--- a/AT32F425/src/DAP_config.h
+++ b/AT32F425/src/DAP_config.h
@@ -78,12 +78,12 @@ DAP Hardware I/O Pin Access Functions
 #define SWDIO_PIN_INDEX		0
 
 #define SWD_RST_PORT		GPIOA
-#define SWD_RST_PIN			GPIO_PINS_7
+#define SWD_RST_PIN			GPIO_PINS_4
 
 #define LED_CONNECTED_PORT	GPIOA
-#define LED_CONNECTED_PIN	GPIO_PINS_4
+#define LED_CONNECTED_PIN	GPIO_PINS_5
 #define LED_RUNNING_PORT	GPIOA
-#define LED_RUNNING_PIN		GPIO_PINS_4
+#define LED_RUNNING_PIN		GPIO_PINS_5
 
 
 /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET.
diff --git a/CH32V203/src/DAP_config.h b/CH32V203/src/DAP_config.h
index a2d764f..14c5e21 100644
--- a/CH32V203/src/DAP_config.h
+++ b/CH32V203/src/DAP_config.h
@@ -78,12 +78,12 @@ DAP Hardware I/O Pin Access Functions
 #define SWDIO_PIN_INDEX		0
 
 #define SWD_RST_PORT		GPIOA
-#define SWD_RST_PIN			GPIO_Pin_7
+#define SWD_RST_PIN			GPIO_Pin_4
 
 #define LED_CONNECTED_PORT	GPIOA
-#define LED_CONNECTED_PIN	GPIO_Pin_4
+#define LED_CONNECTED_PIN	GPIO_Pin_5
 #define LED_RUNNING_PORT	GPIOA
-#define LED_RUNNING_PIN		GPIO_Pin_4
+#define LED_RUNNING_PIN		GPIO_Pin_5
 
 
 /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET.
diff --git a/CH32V305/src/DAP_config.h b/CH32V305/src/DAP_config.h
index fa24736..a90fde6 100644
--- a/CH32V305/src/DAP_config.h
+++ b/CH32V305/src/DAP_config.h
@@ -78,12 +78,12 @@ DAP Hardware I/O Pin Access Functions
 #define SWDIO_PIN_INDEX		0
 
 #define SWD_RST_PORT		GPIOA
-#define SWD_RST_PIN			GPIO_Pin_7
+#define SWD_RST_PIN			GPIO_Pin_4
 
 #define LED_CONNECTED_PORT	GPIOA
-#define LED_CONNECTED_PIN	GPIO_Pin_4
+#define LED_CONNECTED_PIN	GPIO_Pin_5
 #define LED_RUNNING_PORT	GPIOA
-#define LED_RUNNING_PIN		GPIO_Pin_4
+#define LED_RUNNING_PIN		GPIO_Pin_5
 
 
 /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET.
diff --git a/M482/DAPLink.uvoptx b/M482/DAPLink.uvoptx
index dd71909..4c62f37 100644
--- a/M482/DAPLink.uvoptx
+++ b/M482/DAPLink.uvoptx
@@ -269,7 +269,7 @@
 
   <Group>
     <GroupName>DAP</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -313,7 +313,7 @@
 
   <Group>
     <GroupName>SWD_host</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -333,7 +333,7 @@
 
   <Group>
     <GroupName>CSL/StdPD</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -425,7 +425,7 @@
 
   <Group>
     <GroupName>CSL/CMSIS</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
diff --git a/README.md b/README.md
index 6771b6a..0c9707d 100644
--- a/README.md
+++ b/README.md
@@ -9,10 +9,10 @@ DAPLink (CMSIS-DAP) based on Artery AT32F425 (support crystal-less USB), support
 |  :----   | :---- |
 | SWD_CLK  | PA.1  |
 | SWD_DIO  | PA.0  |
-| SWD_RST  | PA.7  |
+| SWD_RST  | PA.4  |
 | CDC_TXD  | PA.2  |
 | CDC_RXD  | PA.3  |
-| LED_SWD  | PA.4  |
+| LED_SWD  | PA.5  |
 
 ## DAPLink-CH32V203
 DAPLink (CMSIS-DAP) based on WCH CH32V203 (support crystal-less USB), supports SWD and CDC.
@@ -22,10 +22,10 @@ DAPLink (CMSIS-DAP) based on WCH CH32V203 (support crystal-less USB), supports S
 |  :----   | :---- |
 | SWD_CLK  | PA.1  |
 | SWD_DIO  | PA.0  |
-| SWD_RST  | PA.7  |
+| SWD_RST  | PA.4  |
 | CDC_TXD  | PA.2  |
 | CDC_RXD  | PA.3  |
-| LED_SWD  | PA.4  |
+| LED_SWD  | PA.5  |
 
 ## DAPLink-CH32V305
 DAPLink (CMSIS-DAP) based on WCH CH32V305 (High Speed USB with on-chip PHY), supports SWD and CDC.
@@ -35,10 +35,10 @@ DAPLink (CMSIS-DAP) based on WCH CH32V305 (High Speed USB with on-chip PHY), sup
 |  :----   | :---- |
 | SWD_CLK  | PA.1  |
 | SWD_DIO  | PA.0  |
-| SWD_RST  | PA.7  |
+| SWD_RST  | PA.4  |
 | CDC_TXD  | PA.2  |
 | CDC_RXD  | PA.3  |
-| LED_SWD  | PA.4  |
+| LED_SWD  | PA.5  |
 
 ## DAPLink-M482
 DAPLink (CMSIS-DAP) based on Nuvoton M482, supports SWD and CDC.