diff --git a/CH32V305/src/DAP_config.h b/CH32V305/src/DAP_config.h index a90fde6..514f8c5 100644 --- a/CH32V305/src/DAP_config.h +++ b/CH32V305/src/DAP_config.h @@ -71,19 +71,19 @@ DAP Hardware I/O Pin Access Functions // Configure DAP I/O pins ------------------------------ -#define SWCLK_PORT GPIOA -#define SWCLK_PIN GPIO_Pin_1 -#define SWDIO_PORT GPIOA -#define SWDIO_PIN GPIO_Pin_0 -#define SWDIO_PIN_INDEX 0 +#define SWCLK_PORT GPIOB +#define SWCLK_PIN GPIO_Pin_13 +#define SWDIO_PORT GPIOB +#define SWDIO_PIN GPIO_Pin_12 +#define SWDIO_PIN_INDEX 12 -#define SWD_RST_PORT GPIOA -#define SWD_RST_PIN GPIO_Pin_4 +#define SWD_RST_PORT GPIOC +#define SWD_RST_PIN GPIO_Pin_8 -#define LED_CONNECTED_PORT GPIOA -#define LED_CONNECTED_PIN GPIO_Pin_5 -#define LED_RUNNING_PORT GPIOA -#define LED_RUNNING_PIN GPIO_Pin_5 +#define LED_CONNECTED_PORT GPIOC +#define LED_CONNECTED_PIN GPIO_Pin_7 +#define LED_RUNNING_PORT GPIOC +#define LED_RUNNING_PIN GPIO_Pin_7 /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET. @@ -134,6 +134,7 @@ static void PORT_OFF(void) RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); GPIO_InitStruct.GPIO_Pin = SWCLK_PIN; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPD; diff --git a/CH32V305/src/vcom_serial.c b/CH32V305/src/vcom_serial.c index 8eb9780..7a1a531 100644 --- a/CH32V305/src/vcom_serial.c +++ b/CH32V305/src/vcom_serial.c @@ -25,23 +25,23 @@ void VCOM_Init(void) USART_InitTypeDef USART_InitStructure; DMA_InitTypeDef DMA_InitStructure; - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); RCC_AHBPeriphClockCmd (RCC_AHBPeriph_DMA1, ENABLE); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); // PA2 => USART2_TX + GPIO_Init(GPIOB, &GPIO_InitStructure); // PB10 => USART3_TX - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; - GPIO_Init(GPIOA, &GPIO_InitStructure); // PA3 => USART2_RX + GPIO_Init(GPIOB, &GPIO_InitStructure); // PB11 => USART3_RX DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; - DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&USART2->DATAR; + DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&USART3->DATAR; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryBaseAddr = (u32)TXBuffer; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; @@ -51,13 +51,13 @@ void VCOM_Init(void) DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; - DMA_Init(DMA1_Channel7, &DMA_InitStructure); - DMA_Cmd(DMA1_Channel7, ENABLE); + DMA_Init(DMA1_Channel2, &DMA_InitStructure); + DMA_Cmd(DMA1_Channel2, ENABLE); DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_MemoryBaseAddr = (u32)RXBuffer; - DMA_Init(DMA1_Channel6, &DMA_InitStructure); - DMA_Cmd(DMA1_Channel6, ENABLE); + DMA_Init(DMA1_Channel3, &DMA_InitStructure); + DMA_Cmd(DMA1_Channel3, ENABLE); USART_InitStructure.USART_BaudRate = LineCfg.u32DTERate; @@ -66,11 +66,11 @@ void VCOM_Init(void) USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_Init(USART2, &USART_InitStructure); + USART_Init(USART3, &USART_InitStructure); - USART_DMACmd(USART2, USART_DMAReq_Tx | USART_DMAReq_Rx, ENABLE); + USART_DMACmd(USART3, USART_DMAReq_Tx | USART_DMAReq_Rx, ENABLE); - USART_Cmd(USART2, ENABLE); + USART_Cmd(USART3, ENABLE); } @@ -109,7 +109,7 @@ void VCOM_LineCoding(VCOM_LINE_CODING * LineCfgx) __disable_irq(); - USART_Init(USART2, &USART_InitStructure); + USART_Init(USART3, &USART_InitStructure); RX_Timeout = (1000.0 / USART_InitStructure.USART_BaudRate) * (512 * 10) * 1.5; @@ -124,23 +124,23 @@ void VCOM_TransferData(void) if(Vcom.in_ready) // 可以向主机发送数据 { - if((DMA1->INTFR & (DMA1_FLAG_HT6 | DMA1_FLAG_TC6)) || (SysTick_ms > RX_Timeout)) + if((DMA1->INTFR & (DMA1_FLAG_HT3 | DMA1_FLAG_TC3)) || (SysTick_ms > RX_Timeout)) { - if(DMA1->INTFR & DMA1_FLAG_HT6) + if(DMA1->INTFR & DMA1_FLAG_HT3) { rxdata = &RXBuffer[0]; Vcom.in_bytes = BUF_SZ/2; - DMA1->INTFCR = DMA1_FLAG_HT6; + DMA1->INTFCR = DMA1_FLAG_HT3; } - else if(DMA1->INTFR & DMA1_FLAG_TC6) + else if(DMA1->INTFR & DMA1_FLAG_TC3) { rxdata = &RXBuffer[BUF_SZ/2]; Vcom.in_bytes = BUF_SZ/2; - DMA1->INTFCR = DMA1_FLAG_TC6; + DMA1->INTFCR = DMA1_FLAG_TC3; SysTick_ms = 0; } @@ -148,7 +148,7 @@ void VCOM_TransferData(void) { SysTick_ms = 0; - uint32_t n_xfer = BUF_SZ - DMA_GetCurrDataCounter(DMA1_Channel6); + uint32_t n_xfer = BUF_SZ - DMA_GetCurrDataCounter(DMA1_Channel3); if(n_xfer == 0) { goto xfer_out; @@ -166,9 +166,9 @@ void VCOM_TransferData(void) Vcom.in_bytes = n_xfer - BUF_SZ/2; } - DMA_Cmd(DMA1_Channel6, DISABLE); - DMA_SetCurrDataCounter(DMA1_Channel6, BUF_SZ); - DMA_Cmd(DMA1_Channel6, ENABLE); + DMA_Cmd(DMA1_Channel3, DISABLE); + DMA_SetCurrDataCounter(DMA1_Channel3, BUF_SZ); + DMA_Cmd(DMA1_Channel3, ENABLE); } Vcom.in_ready = 0; @@ -193,15 +193,15 @@ void VCOM_TransferData(void) xfer_out: /* 从主机接收到数据，且前面的数据 DMA 已发送完 */ - if(Vcom.out_ready && (DMA_GetCurrDataCounter(DMA1_Channel7) == 0)) + if(Vcom.out_ready && (DMA_GetCurrDataCounter(DMA1_Channel2) == 0)) { Vcom.out_ready = 0; memcpy(TXBuffer, USBHS_EP3_Rx_Buf, Vcom.out_bytes); - DMA_Cmd(DMA1_Channel7, DISABLE); - DMA_SetCurrDataCounter(DMA1_Channel7, Vcom.out_bytes); - DMA_Cmd(DMA1_Channel7, ENABLE); + DMA_Cmd(DMA1_Channel2, DISABLE); + DMA_SetCurrDataCounter(DMA1_Channel2, Vcom.out_bytes); + DMA_Cmd(DMA1_Channel2, ENABLE); /* Ready for next BULK OUT */ USBHSD->UEP3_RX_CTRL = (USBHSD->UEP3_RX_CTRL & ~USBHS_UEP_R_RES_MASK) | USBHS_UEP_R_RES_ACK; diff --git a/README.md b/README.md index c90650d..2f967b0 100644 --- a/README.md +++ b/README.md @@ -12,7 +12,8 @@ DAPLink (CMSIS-DAP) based on Artery AT32F425 (support crystal-less USB), support | SWD_RST | PA.4 | | CDC_TXD | PA.2 | | CDC_RXD | PA.3 | -| LED_SWD | PA.5 | + +Sch & PCB: [https://oshwhub.com/xivn1987/daplink](https://oshwhub.com/xivn1987/daplink) ## DAPLink-CH32V203 DAPLink (CMSIS-DAP) based on WCH CH32V203 (support crystal-less USB), supports SWD and CDC. @@ -25,7 +26,8 @@ DAPLink (CMSIS-DAP) based on WCH CH32V203 (support crystal-less USB), supports S | SWD_RST | PA.4 | | CDC_TXD | PA.2 | | CDC_RXD | PA.3 | -| LED_SWD | PA.5 | + +Sch & PCB: [https://oshwhub.com/xivn1987/daplink](https://oshwhub.com/xivn1987/daplink) ## DAPLink-CH32V305 DAPLink (CMSIS-DAP) based on WCH CH32V305 (High Speed USB with on-chip PHY), supports SWD and CDC. @@ -33,12 +35,13 @@ DAPLink (CMSIS-DAP) based on WCH CH32V305 (High Speed USB with on-chip PHY), sup ### Pin map | FUNC | Pin | | :---- | :---- | -| SWD_CLK | PA.1 | -| SWD_DIO | PA.0 | -| SWD_RST | PA.4 | -| CDC_TXD | PA.2 | -| CDC_RXD | PA.3 | -| LED_SWD | PA.5 | +| SWD_CLK | PB.13 | +| SWD_DIO | PB.12 | +| SWD_RST | PC.8 | +| CDC_TXD | PB.10 | +| CDC_RXD | PB.11 | + +Sch & PCB: [https://oshwhub.com/xivn1987/DAPLink-HS](https://oshwhub.com/xivn1987/DAPLink-HS) ## DAPLink-M482 DAPLink (CMSIS-DAP) based on Nuvoton M482, supports SWD and CDC. @@ -55,9 +58,6 @@ In the C/C++ page of Keil Option Window: | SWD_RST | PF.4 | | CDC_TXD | PB.1 | | CDC_RXD | PB.0 | -| LED_SWD | PA.2 | -| LED_TXD | PC.1 | -| LED_RXD | PC.0 | ## DAPLink-M484 DAPLink (CMSIS-DAP) based on Nuvoton M484 (High Speed USB with on-chip PHY), supports SWD and CDC. @@ -70,6 +70,3 @@ DAPLink (CMSIS-DAP) based on Nuvoton M484 (High Speed USB with on-chip PHY), sup | SWD_RST | PF.4 | | CDC_TXD | PB.1 | | CDC_RXD | PB.0 | -| LED_SWD | PA.2 | -| LED_TXD | PC.1 | -| LED_RXD | PC.0 |