prevent UART TX Buffer writing by USB OUT packet when UART TXing.

This commit is contained in:
XIVN1987
2023-05-30 19:24:11 +08:00
parent f9018ffcb8
commit 175ec1a531
4 changed files with 6 additions and 15 deletions
@@ -644,8 +644,6 @@ void USBHS_IRQHandler( void )
USBHSD->UEP3_RX_CTRL ^= USBHS_UEP_R_TOG_DATA1;
USBHSD->UEP3_RX_CTRL = (USBHSD->UEP3_RX_CTRL & ~USBHS_UEP_R_RES_MASK) | USBHS_UEP_R_RES_NAK;
extern uint8_t TXBuffer[];
memcpy(TXBuffer, USBHS_EP3_Rx_Buf, len);
Vcom.out_bytes = len;
Vcom.out_ready = 1;
break;
+3 -10
View File
@@ -109,15 +109,6 @@ void VCOM_LineCoding(VCOM_LINE_CODING * LineCfgx)
__disable_irq();
// Reset software FIFO
Vcom.rx_bytes = 0;
Vcom.rx_wrptr = 0;
Vcom.rx_rdptr = 0;
Vcom.tx_bytes = 0;
Vcom.tx_wrptr = 0;
Vcom.tx_rdptr = 0;
USART_Init(USART2, &USART_InitStructure);
RX_Timeout = (1000.0 / USART_InitStructure.USART_BaudRate) * (512 * 10) * 1.5;
@@ -201,11 +192,13 @@ void VCOM_TransferData(void)
}
xfer_out:
/* 从主机接收到数据,且 tx_buff 能够装下它们 */
/* 从主机接收到数据,且前面的数据 DMA 已发送完 */
if(Vcom.out_ready && (DMA_GetCurrDataCounter(DMA1_Channel7) == 0))
{
Vcom.out_ready = 0;
memcpy(TXBuffer, USBHS_EP3_Rx_Buf, Vcom.out_bytes);
DMA_Cmd(DMA1_Channel7, DISABLE);
DMA_SetCurrDataCounter(DMA1_Channel7, Vcom.out_bytes);
DMA_Cmd(DMA1_Channel7, ENABLE);
+2 -2
View File
@@ -17,10 +17,10 @@ typedef struct {
uint16_t hw_flow; // BIT0: DTR(Data Terminal Ready) , BIT1: RTS(Request To Send)
uint8_t in_buff[64];
uint8_t in_buff[512];
uint16_t in_bytes;
uint16_t in_ready;
uint8_t out_buff[64];
uint8_t out_buff[512];
uint16_t out_bytes;
uint16_t out_ready;
} VCOM;