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630 lines
13 KiB
630 lines
13 KiB
/*---------------------------------------------------------------------------- |
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* RL-ARM - USB |
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*---------------------------------------------------------------------------- |
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* Name: usbd_STM32F103.c |
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* Purpose: Hardware Layer module for ST STM32F103 |
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* Rev.: V4.70 |
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*---------------------------------------------------------------------------- |
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* This code is part of the RealView Run-Time Library. |
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* Copyright (c) 2004-2013 KEIL - An ARM Company. All rights reserved. |
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*---------------------------------------------------------------------------*/ |
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/* Double Buffering is not yet supported */ |
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#define __STM32 |
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#include <RTL.h> |
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#include <rl_usb.h> |
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#include "usbreg.h" |
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#include <stm32f10x.h> |
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#include "DAP_config.h" |
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#define __NO_USB_LIB_C |
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#include "usb_config.c" |
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#define USB_DBL_BUF_EP 0x0000 |
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#define EP_BUF_ADDR (sizeof(EP_BUF_DSCR) * (USBD_EP_NUM + 1)) /* Endpoint Buf Adr */ |
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// Ptr to EP Buf Desc |
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EP_BUF_DSCR *pBUF_DSCR = (EP_BUF_DSCR *)USB_PMA_ADDR; |
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// Endpoint Free Buffer Address |
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U16 FreeBufAddr; |
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/** |
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* @brief Reset Endpoint |
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* @params EPNum: Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* @return None |
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*/ |
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void EP_Reset (U32 EPNum) |
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{ |
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U32 num, val; |
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num = EPNum & 0x0F; |
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val = EPxREG(num); |
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if (EPNum & 0x80) |
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{ // IN Endpoint |
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EPxREG(num) = val & (EP_MASK | EP_DTOG_TX); |
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} |
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else |
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{ // OUT Endpoint |
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EPxREG(num) = val & (EP_MASK | EP_DTOG_RX); |
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} |
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} |
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/** |
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* @brief Set Endpoint Status |
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* @perems EPNum: Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* stat: New Status |
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* @return None |
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*/ |
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void EP_Status (U32 EPNum, U32 stat) |
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{ |
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U32 num, val; |
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num = EPNum & 0x0F; |
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val = EPxREG(num); |
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if (EPNum & 0x80) |
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{ /* IN Endpoint */ |
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EPxREG(num) = (val ^ (stat & EP_STAT_TX)) & (EP_MASK | EP_STAT_TX); |
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} |
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else |
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{ /* OUT Endpoint */ |
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EPxREG(num) = (val ^ (stat & EP_STAT_RX)) & (EP_MASK | EP_STAT_RX); |
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} |
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} |
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/** |
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* @brief USB Device Interrupt enable |
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* Called by USBD_Init to enable the USB Interrupt |
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* @return None |
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*/ |
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#ifdef __RTX |
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void __svc(1) USBD_IntrEna (void); |
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void __SVC_1 (void) |
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{ |
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#else |
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void USBD_IntrEna (void) |
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{ |
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#endif |
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NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn); |
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} |
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/** |
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* @brief USB Device Initialize Function |
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* Called by the User to initialize USB |
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* @return None |
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*/ |
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void USBD_Init (void) |
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{ |
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RCC->APB1ENR |= RCC_APB1ENR_USBEN; |
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USBD_IntrEna (); /* Enable USB Interrupts */ |
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PORT_USB_CONNECT_SETUP(); |
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} |
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/* |
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* USB Device Connect Function |
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* Called by the User to Connect/Disconnect USB Device |
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* Parameters: con: Connect/Disconnect |
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* Return Value: None |
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*/ |
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void USBD_Connect (BOOL con) |
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{ |
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if (con) |
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{ |
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CNTR = CNTR_FRES; /* Force USB Reset */ |
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CNTR = 0; |
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ISTR = 0; /* Clear Interrupt Status */ |
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CNTR = CNTR_RESETM | CNTR_SUSPM | CNTR_WKUPM; /* USB Interrupt Mask */ |
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PIN_USB_CONNECT_ON(); |
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} |
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else |
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{ |
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CNTR = CNTR_FRES | CNTR_PDWN; /* Switch Off USB Device */ |
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PIN_USB_CONNECT_OFF(); |
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} |
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} |
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/* |
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* USB Device Reset Function |
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* Called automatically on USB Device Reset |
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* Return Value: None |
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*/ |
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void USBD_Reset (void) |
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{ |
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/* Double Buffering is not yet supported */ |
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ISTR = 0; /* Clear Interrupt Status */ |
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CNTR = CNTR_CTRM | CNTR_RESETM | CNTR_SUSPM | CNTR_WKUPM |
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#ifdef __RTX |
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| ((USBD_RTX_DevTask != 0) ? CNTR_ERRM : 0) |
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| ((USBD_RTX_DevTask != 0) ? CNTR_PMAOVRM : 0) |
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| ((USBD_RTX_DevTask != 0) ? CNTR_SOFM : 0) |
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| ((USBD_RTX_DevTask != 0) ? CNTR_ESOFM : 0); |
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#else |
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| ((USBD_P_Error_Event != 0) ? CNTR_ERRM : 0) |
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| ((USBD_P_Error_Event != 0) ? CNTR_PMAOVRM : 0) |
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| ((USBD_P_SOF_Event != 0) ? CNTR_SOFM : 0) |
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| ((USBD_P_SOF_Event != 0) ? CNTR_ESOFM : 0); |
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#endif |
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FreeBufAddr = EP_BUF_ADDR; |
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BTABLE = 0x00; /* set BTABLE Address */ |
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/* Setup Control Endpoint 0 */ |
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pBUF_DSCR->ADDR_TX = FreeBufAddr; |
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FreeBufAddr += USBD_MAX_PACKET0; |
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pBUF_DSCR->ADDR_RX = FreeBufAddr; |
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FreeBufAddr += USBD_MAX_PACKET0; |
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if (USBD_MAX_PACKET0 > 62) |
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{ |
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pBUF_DSCR->COUNT_RX = ((USBD_MAX_PACKET0 << 5) - 1) | 0x8000; |
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} |
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else |
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{ |
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pBUF_DSCR->COUNT_RX = USBD_MAX_PACKET0 << 9; |
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} |
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EPxREG(0) = EP_CONTROL | EP_RX_VALID; |
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DADDR = DADDR_EF | 0; /* Enable USB Default Address */ |
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} |
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/* |
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* USB Device Suspend Function |
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* Called automatically on USB Device Suspend |
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* Return Value: None |
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*/ |
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void USBD_Suspend (void) |
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{ |
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CNTR |= CNTR_FSUSP; /* Force Suspend */ |
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CNTR |= CNTR_LPMODE; /* Low Power Mode */ |
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} |
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/* |
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* USB Device Resume Function |
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* Called automatically on USB Device Resume |
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* Return Value: None |
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*/ |
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void USBD_Resume (void) |
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{ |
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/* Performed by Hardware */ |
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} |
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/* |
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* USB Device Remote Wakeup Function |
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* Called automatically on USB Device Remote Wakeup |
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* Return Value: None |
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*/ |
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void USBD_WakeUp (void) |
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{ |
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CNTR &= ~CNTR_FSUSP; /* Clear Suspend */ |
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} |
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/* |
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* USB Device Remote Wakeup Configuration Function |
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* Parameters: cfg: Device Enable/Disable |
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* Return Value: None |
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*/ |
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void USBD_WakeUpCfg (BOOL cfg) |
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{ |
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/* Not needed */ |
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} |
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/* |
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* USB Device Set Address Function |
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* Parameters: adr: USB Device Address |
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* setup: Called in setup stage (!=0), else after status stage |
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* Return Value: None |
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*/ |
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void USBD_SetAddress (U32 adr, U32 setup) |
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{ |
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if (setup) |
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return; |
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DADDR = DADDR_EF | adr; |
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} |
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/* |
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* USB Device Configure Function |
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* Parameters: cfg: Device Configure/Deconfigure |
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* Return Value: None |
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*/ |
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void USBD_Configure (BOOL cfg) |
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{ |
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if (cfg == __FALSE) |
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{ |
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FreeBufAddr = EP_BUF_ADDR; |
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FreeBufAddr += 2 * USBD_MAX_PACKET0; /* reset Buffer address */ |
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} |
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} |
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/* |
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* Configure USB Device Endpoint according to Descriptor |
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* Parameters: pEPD: Pointer to Device Endpoint Descriptor |
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* Return Value: None |
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*/ |
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void USBD_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) |
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{ |
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/* Double Buffering is not yet supported */ |
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U32 num, val; |
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num = pEPD->bEndpointAddress & 0x0F; |
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val = pEPD->wMaxPacketSize; |
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if (pEPD->bEndpointAddress & USB_ENDPOINT_DIRECTION_MASK) |
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{ |
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(pBUF_DSCR + num)->ADDR_TX = FreeBufAddr; |
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val = (val + 1) & ~1; |
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} |
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else |
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{ |
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(pBUF_DSCR + num)->ADDR_RX = FreeBufAddr; |
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if (val > 62) |
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{ |
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val = (val + 31) & ~31; |
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(pBUF_DSCR + num)->COUNT_RX = ((val << 5) - 1) | 0x8000; |
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} |
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else |
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{ |
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val = (val + 1) & ~1; |
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(pBUF_DSCR + num)->COUNT_RX = val << 9; |
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} |
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} |
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FreeBufAddr += val; |
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switch (pEPD->bmAttributes & USB_ENDPOINT_TYPE_MASK) |
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{ |
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case USB_ENDPOINT_TYPE_CONTROL: |
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val = EP_CONTROL; |
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break; |
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case USB_ENDPOINT_TYPE_ISOCHRONOUS: |
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val = EP_ISOCHRONOUS; |
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break; |
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case USB_ENDPOINT_TYPE_BULK: |
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val = EP_BULK; |
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if (USB_DBL_BUF_EP & (1 << num)) |
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{ |
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val |= EP_KIND; |
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} |
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break; |
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case USB_ENDPOINT_TYPE_INTERRUPT: |
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val = EP_INTERRUPT; |
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break; |
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} |
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val |= num; |
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EPxREG(num) = val; |
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} |
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/* |
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* Set Direction for USB Device Control Endpoint |
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* Parameters: dir: Out (dir == 0), In (dir <> 0) |
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* Return Value: None |
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*/ |
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void USBD_DirCtrlEP (U32 dir) |
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{ |
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/* Not needed */ |
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} |
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/* |
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* Enable USB Device Endpoint |
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* Parameters: EPNum: Device Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* Return Value: None |
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*/ |
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void USBD_EnableEP (U32 EPNum) |
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{ |
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EP_Status(EPNum, EP_TX_NAK | EP_RX_VALID); /* EP is able to receive */ |
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} |
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/* |
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* Disable USB Endpoint |
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* Parameters: EPNum: Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* Return Value: None |
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*/ |
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void USBD_DisableEP (U32 EPNum) |
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{ |
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EP_Status(EPNum, EP_TX_DIS | EP_RX_DIS); |
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} |
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/* |
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* Reset USB Device Endpoint |
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* Parameters: EPNum: Device Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* Return Value: None |
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*/ |
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void USBD_ResetEP (U32 EPNum) |
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{ |
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EP_Reset(EPNum); |
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} |
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/* |
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* Set Stall for USB Device Endpoint |
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* Parameters: EPNum: Device Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* Return Value: None |
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*/ |
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void USBD_SetStallEP (U32 EPNum) |
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{ |
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EP_Status(EPNum, EP_TX_STALL | EP_RX_STALL); |
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} |
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/* |
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* Clear Stall for USB Device Endpoint |
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* Parameters: EPNum: Device Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* Return Value: None |
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*/ |
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void USBD_ClrStallEP (U32 EPNum) |
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{ |
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EP_Reset(EPNum); /* reset DTog Bits */ |
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EP_Status(EPNum, EP_TX_VALID | EP_RX_VALID); |
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} |
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/* |
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* Clear USB Device Endpoint Buffer |
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* Parameters: EPNum: Device Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* Return Value: None |
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*/ |
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void USBD_ClearEPBuf (U32 EPNum) |
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{ |
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; |
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} |
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/* |
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* Read USB Device Endpoint Data |
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* Parameters: EPNum: Device Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* pData: Pointer to Data Buffer |
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* Return Value: Number of bytes read |
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*/ |
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U32 USBD_ReadEP (U32 EPNum, U8 *pData) |
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{ |
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/* Double Buffering is not yet supported */ |
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U32 num, cnt, *pv, n; |
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num = EPNum & 0x0F; |
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pv = (U32 *)(USB_PMA_ADDR + 2 * ((pBUF_DSCR + num)->ADDR_RX)); |
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cnt = (pBUF_DSCR + num)->COUNT_RX & EP_COUNT_MASK; |
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for (n = 0; n < (cnt + 1) / 2; n++) |
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{ |
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*((__packed U16 *)pData) = *pv++; |
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pData += 2; |
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} |
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EP_Status(EPNum, EP_RX_VALID); |
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return (cnt); |
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} |
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/* |
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* Write USB Device Endpoint Data |
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* Parameters: EPNum: Device Endpoint Number |
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* EPNum.0..3: Address |
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* EPNum.7: Dir |
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* pData: Pointer to Data Buffer |
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* cnt: Number of bytes to write |
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* Return Value: Number of bytes written |
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*/ |
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U32 USBD_WriteEP (U32 EPNum, U8 *pData, U32 cnt) |
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{ |
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/* Double Buffering is not yet supported */ |
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U32 num, *pv, n; |
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U16 statusEP; |
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num = EPNum & 0x0F; |
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pv = (U32 *)(USB_PMA_ADDR + 2 * ((pBUF_DSCR + num)->ADDR_TX)); |
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for (n = 0; n < (cnt + 1) / 2; n++) |
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{ |
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*pv++ = *((__packed U16 *)pData); |
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pData += 2; |
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} |
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(pBUF_DSCR + num)->COUNT_TX = cnt; |
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statusEP = EPxREG(num); |
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if ((statusEP & EP_STAT_TX) != EP_TX_STALL) |
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{ /* do not make EP valid if stalled */ |
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EP_Status(EPNum, EP_TX_VALID); |
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} |
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return (cnt); |
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} |
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/* |
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* Get USB Device Last Frame Number |
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* Parameters: None |
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* Return Value: Frame Number |
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*/ |
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U32 USBD_GetFrame (void) |
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{ |
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return (FNR & FNR_FN); |
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} |
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#ifdef __RTX |
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U32 LastError; /* Last Error */ |
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/* |
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* Get USB Last Error Code |
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* Parameters: None |
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* Return Value: Error Code |
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*/ |
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U32 USBD_GetError (void) |
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{ |
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return (LastError); |
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} |
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#endif |
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/* |
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* USB Device Interrupt Service Routine |
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*/ |
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void USB_LP_CAN1_RX0_IRQHandler(void) |
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{ |
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U32 istr, num, val; |
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istr = ISTR; |
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if (istr & ISTR_RESET) |
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{ /* USB Reset Request */ |
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USBD_Reset(); |
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usbd_reset_core(); |
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#ifdef __RTX |
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if (USBD_RTX_DevTask) |
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{ |
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isr_evt_set(USBD_EVT_RESET, USBD_RTX_DevTask); |
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} |
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#else |
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if (USBD_P_Reset_Event) |
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{ |
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USBD_P_Reset_Event(); |
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} |
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#endif |
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ISTR = ~ISTR_RESET; |
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} |
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if (istr & ISTR_SUSP) |
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{ /* USB Suspend Request */ |
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USBD_Suspend(); |
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#ifdef __RTX |
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if (USBD_RTX_DevTask) |
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{ |
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isr_evt_set(USBD_EVT_SUSPEND, USBD_RTX_DevTask); |
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} |
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#else |
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if (USBD_P_Suspend_Event) |
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{ |
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USBD_P_Suspend_Event(); |
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} |
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#endif |
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ISTR = ~ISTR_SUSP; |
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} |
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if (istr & ISTR_WKUP) |
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{ /* USB Wakeup */ |
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USBD_WakeUp(); |
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#ifdef __RTX |
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if (USBD_RTX_DevTask) |
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{ |
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isr_evt_set(USBD_EVT_RESUME, USBD_RTX_DevTask); |
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} |
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#else |
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if (USBD_P_Resume_Event) |
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{ |
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USBD_P_Resume_Event(); |
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} |
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#endif |
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ISTR = ~ISTR_WKUP; |
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} |
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if (istr & ISTR_SOF) |
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{ /* Start of Frame */ |
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#ifdef __RTX |
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if (USBD_RTX_DevTask) |
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{ |
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isr_evt_set(USBD_EVT_SOF, USBD_RTX_DevTask); |
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} |
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#else |
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if (USBD_P_SOF_Event) |
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{ |
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USBD_P_SOF_Event(); |
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} |
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#endif |
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ISTR = ~ISTR_SOF; |
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} |
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if (istr & ISTR_PMAOVR) |
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{ |
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#ifdef __RTX |
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LastError = 2; |
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if (USBD_RTX_DevTask) |
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{ /* PMA Over/underrun */ |
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isr_evt_set(USBD_EVT_ERROR, USBD_RTX_DevTask); |
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} |
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#else |
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if (USBD_P_Error_Event) |
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{ |
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USBD_P_Error_Event(2); |
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} |
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#endif |
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ISTR = ~ISTR_PMAOVR; |
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} |
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if (istr & ISTR_ERR) |
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{ /* Error: No Answer, CRC Error, Bit Stuff Error, Frame Format Error */ |
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#ifdef __RTX |
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LastError = 1; |
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if (USBD_RTX_DevTask) |
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{ |
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isr_evt_set(USBD_EVT_ERROR, USBD_RTX_DevTask); |
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} |
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#else |
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if (USBD_P_Error_Event) |
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{ |
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USBD_P_Error_Event(1); |
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} |
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#endif |
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ISTR = ~ISTR_ERR; |
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} |
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while ((istr = ISTR) & ISTR_CTR) |
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{ /* Endpoint Interrupts */ |
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ISTR = ~ISTR_CTR; |
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num = istr & ISTR_EP_ID; |
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val = EPxREG(num); |
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if (val & EP_CTR_RX) |
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{ |
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EPxREG(num) = val & ~EP_CTR_RX & EP_MASK; |
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#ifdef __RTX |
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if (USBD_RTX_EPTask[num]) |
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{ |
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isr_evt_set((val & EP_SETUP) ? USBD_EVT_SETUP : USBD_EVT_OUT, USBD_RTX_EPTask[num]); |
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} |
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#else |
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if (USBD_P_EP[num]) |
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{ |
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USBD_P_EP[num]((val & EP_SETUP) ? USBD_EVT_SETUP : USBD_EVT_OUT); |
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} |
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#endif |
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} |
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if (val & EP_CTR_TX) |
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{ |
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EPxREG(num) = val & ~EP_CTR_TX & EP_MASK; |
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#ifdef __RTX |
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if (USBD_RTX_EPTask[num]) |
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{ |
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isr_evt_set(USBD_EVT_IN, USBD_RTX_EPTask[num]); |
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} |
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#else |
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if (USBD_P_EP[num]) |
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{ |
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USBD_P_EP[num](USBD_EVT_IN); |
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} |
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#endif |
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} |
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} |
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}
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