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734 lines
24 KiB
734 lines
24 KiB
/**************************************************************************//** |
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* @file DAP_config.h |
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* @brief CMSIS-DAP Configuration File for STM32F103C6/8/B |
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* @version V1.00 |
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* @date 02. Oct 2012 |
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* |
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* @note |
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* Copyright (C) 2012 ARM Limited. All rights reserved. |
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* |
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* @par |
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* ARM Limited (ARM) is supplying this software for use with Cortex-M |
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* processor based microcontrollers. |
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* |
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* @par |
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
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* |
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******************************************************************************/ |
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#ifndef __DAP_CONFIG_H__ |
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#define __DAP_CONFIG_H__ |
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#include <stdio.h> |
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#include <stddef.h> |
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#include <stdint.h> |
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typedef const struct |
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{ |
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void (* LedConnected) (uint16_t); |
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void (* LedRunning) (uint16_t); |
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} CoreDescriptor_t; |
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extern const CoreDescriptor_t * pCoreDescriptor; |
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typedef const struct |
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{ |
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void (* UserInit) (CoreDescriptor_t * core); |
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uint32_t (* UserProcess) (uint8_t *, uint8_t *); |
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void (* UserAbort) (void); |
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} UserAppDescriptor_t; |
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#if !defined ( BOARD_V1 ) \ |
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&& !defined ( BOARD_V2 ) \ |
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&& !defined ( BOARD_V1M ) \ |
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&& !defined ( STLINK_V20 ) \ |
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&& !defined ( STLINK_V21 ) \ |
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&& !defined ( BOARD_STM32RF ) |
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#error "Board undefined" |
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#endif |
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#if defined( __GNUC__ ) |
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/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf |
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set to 'Yes') calls __io_putchar() */ |
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#define PUTCHAR_PROTOTYPE int __io_putchar(int ch) |
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#elif defined( __CC_ARM ) |
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#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f) |
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#else |
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#error "Unknown compiler" |
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#endif |
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#if defined( USE_DEBUG ) |
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#define DEBUG(...) printf(__VA_ARGS__) |
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#define INFO(...) printf(__VA_ARGS__) |
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#define ERROR(...) printf(__VA_ARGS__) |
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#elif defined( USE_INFO ) |
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#define DEBUG(...) |
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#define INFO(...) printf(__VA_ARGS__) |
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#define ERROR(...) printf(__VA_ARGS__) |
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#elif defined( USE_ERROR ) |
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#define DEBUG(...) |
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#define INFO(...) |
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#define ERROR(...) printf(__VA_ARGS__) |
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#else |
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#define DEBUG(...) |
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#define INFO(...) |
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#define ERROR(...) |
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#endif |
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//************************************************************************************************** |
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/** |
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\defgroup DAP_Config_Debug_gr CMSIS-DAP Debug Unit Information |
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\ingroup DAP_ConfigIO_gr |
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@{ |
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Provides definitions about: |
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- Definition of Cortex-M processor parameters used in CMSIS-DAP Debug Unit. |
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- Debug Unit communication packet size. |
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- Debug Access Port communication mode (JTAG or SWD). |
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- Optional information about a connected Target Device (for Evaluation Boards). |
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*/ |
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#include <stm32f10x.h> |
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/// Processor Clock of the Cortex-M MCU used in the Debug Unit. |
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/// This value is used to calculate the SWD/JTAG clock speed. |
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#define CPU_CLOCK SystemCoreClock ///< Specifies the CPU Clock in Hz |
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/// Number of processor cycles for I/O Port write operations. |
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/// This value is used to calculate the SWD/JTAG clock speed that is generated with I/O |
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/// Port write operations in the Debug Unit by a Cortex-M MCU. Most Cortex-M processors |
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/// requrie 2 processor cycles for a I/O Port Write operation. If the Debug Unit uses |
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/// a Cortex-M0+ processor with high-speed peripheral I/O only 1 processor cycle might be |
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/// requrired. |
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#define IO_PORT_WRITE_CYCLES 2 ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0 |
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/// Indicate that Serial Wire Debug (SWD) communication mode is available at the Debug Access Port. |
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/// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>. |
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#define DAP_SWD 1 ///< SWD Mode: 1 = available, 0 = not available |
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/// Indicate that JTAG communication mode is available at the Debug Port. |
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/// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>. |
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#if defined ( BOARD_STM32RF ) \ |
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|| defined ( BOARD_V1M ) \ |
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|| defined ( STLINK_V20 ) \ |
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|| defined ( STLINK_V21 ) |
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#define DAP_JTAG 0 ///< JTAG Mode: 1 = available, 0 = not available. |
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#else |
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#define DAP_JTAG 1 ///< JTAG Mode: 1 = available, 0 = not available. |
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#endif |
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/// Configure maximum number of JTAG devices on the scan chain connected to the Debug Access Port. |
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/// This setting impacts the RAM requirements of the Debug Unit. Valid range is 1 .. 255. |
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#define DAP_JTAG_DEV_CNT 8 ///< Maximum number of JTAG devices on scan chain |
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/// Default communication mode on the Debug Access Port. |
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/// Used for the command \ref DAP_Connect when Port Default mode is selected. |
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#define DAP_DEFAULT_PORT 1 ///< Default JTAG/SWJ Port Mode: 1 = SWD, 2 = JTAG. |
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/// Default communication speed on the Debug Access Port for SWD and JTAG mode. |
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/// Used to initialize the default SWD/JTAG clock frequency. |
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/// The command \ref DAP_SWJ_Clock can be used to overwrite this default setting. |
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#define DAP_DEFAULT_SWJ_CLOCK 1000000 ///< Default SWD/JTAG clock frequency in Hz. |
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/// Maximum Package Size for Command and Response data. |
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/// This configuration settings is used to optimized the communication performance with the |
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/// debugger and depends on the USB peripheral. Change setting to 1024 for High-Speed USB. |
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#define DAP_PACKET_SIZE 64 ///< USB: 64 = Full-Speed, 1024 = High-Speed. |
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/// Maximum Package Buffers for Command and Response data. |
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/// This configuration settings is used to optimized the communication performance with the |
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/// debugger and depends on the USB peripheral. For devices with limited RAM or USB buffer the |
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/// setting can be reduced (valid range is 1 .. 255). Change setting to 4 for High-Speed USB. |
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#define DAP_PACKET_COUNT 42 ///< Buffers: 64 = Full-Speed, 4 = High-Speed. |
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/// Debug Unit is connected to fixed Target Device. |
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/// The Debug Unit may be part of an evaluation board and always connected to a fixed |
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/// known device. In this case a Device Vendor and Device Name string is stored which |
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/// may be used by the debugger or IDE to configure device parameters. |
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#define TARGET_DEVICE_FIXED 0 ///< Target Device: 1 = known, 0 = unknown; |
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#if TARGET_DEVICE_FIXED |
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#define TARGET_DEVICE_VENDOR "" ///< String indicating the Silicon Vendor |
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#define TARGET_DEVICE_NAME "" ///< String indicating the Target Device |
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#endif |
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///@} |
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#define GPIO_INIT(port, data) GPIO_Init(port, (GPIO_InitTypeDef *)&data) |
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#define PIN_MODE_MASK(pin) (((uint32_t)0x0F) << ((pin) << 2)) |
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#define PIN_MODE(mode,pin) (((uint32_t)mode) << ((pin) << 2)) |
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#define PIN_MASK(pin) (((uint16_t)0x01) << (pin)) |
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typedef enum Pin_e { |
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PA = 0x00, PA0 = 0x00, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, |
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PB = 0x10, PB0 = 0x10, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, |
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PC = 0x20, PC0 = 0x20, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, |
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PD = 0x30, PD0 = 0x30, PD1, PD2, |
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} Pin_t; |
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// USART Port and I/O Pins |
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#if defined ( BOARD_V1 ) \ |
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|| defined ( BOARD_V2 ) \ |
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|| defined ( BOARD_V1M ) \ |
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|| defined ( BOARD_STM32RF ) |
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#define USART_CLOCK(state) RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, state) |
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#define USART_GPIO_CLOCK(state) RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, state) |
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#define USART_REMAP() /* GPIO_PinRemapConfig(..., ENABLE) */ |
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#define USART_PORT USART1 |
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#define USART_GPIO GPIOA |
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#define USART_TX_PIN GPIO_Pin_9 |
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#define USART_RX_PIN GPIO_Pin_10 |
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#define USART_IRQn USART1_IRQn |
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#define USART_IRQHandler USART1_IRQHandler |
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#define USART_BUFFER_SIZE (256) /* Size of Receive and Transmit buffers MUST BE 2^n */ |
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#elif defined ( STLINK_V20 ) \ |
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|| defined ( STLINK_V21 ) |
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#define USART_CLOCK(state) RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, state) |
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#define USART_REMAP() /* GPIO_PinRemapConfig(..., ENABLE) */ |
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#define USART_PORT USART2 |
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#define USART_GPIO GPIOA |
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#define USART_TX_PIN GPIO_Pin_2 |
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#define USART_RX_PIN GPIO_Pin_3 |
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#define USART_IRQn USART2_IRQn |
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#define USART_IRQHandler USART2_IRQHandler |
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#define USART_BUFFER_SIZE (256) /* Size of Receive and Transmit buffers MUST BE 2^n */ |
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#else |
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#warning "USART Port not define" |
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#endif |
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// USB Connect Pull-Up |
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#if defined ( BOARD_V1 ) \ |
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|| defined ( BOARD_V2 ) |
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#define PIN_USB_CONNECT_RCC RCC_APB2ENR_IOPAEN |
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#define PIN_USB_CONNECT_PORT GPIOA |
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#define PIN_USB_CONNECT_PIN 8 |
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#define PIN_USB_CONNECT PIN_MASK(PIN_USB_CONNECT_PIN) |
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#define PIN_USB_MODE GPIO_Mode_Out_PP |
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#define PIN_USB_CONNECT_ON() PIN_USB_CONNECT_PORT->BSRR = PIN_USB_CONNECT |
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#define PIN_USB_CONNECT_OFF() PIN_USB_CONNECT_PORT->BRR = PIN_USB_CONNECT |
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#elif defined ( STLINK_V20 ) \ |
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|| defined ( BOARD_V1M ) |
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#define PIN_USB_CONNECT_ON() |
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#define PIN_USB_CONNECT_OFF() |
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#elif defined ( STLINK_V21 ) |
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#define PIN_USB_CONNECT_RCC RCC_APB2ENR_IOPAEN |
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#define PIN_USB_CONNECT_PORT GPIOA |
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#define PIN_USB_CONNECT_PIN 15 |
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#define PIN_USB_CONNECT PIN_MASK(PIN_USB_CONNECT_PIN) |
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#define PIN_USB_MODE GPIO_Mode_Out_OD |
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#define PIN_USB_CONNECT_ON() PIN_USB_CONNECT_PORT->BSRR = PIN_USB_CONNECT |
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#define PIN_USB_CONNECT_OFF() PIN_USB_CONNECT_PORT->BRR = PIN_USB_CONNECT |
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#elif defined ( BOARD_STM32RF ) |
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// USB Connect Pull-Up |
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#define PIN_USB_CONNECT_RCC RCC_APB2ENR_IOPBEN |
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#define PIN_USB_CONNECT_PORT GPIOB |
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#define PIN_USB_CONNECT_PIN 5 |
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#define PIN_USB_CONNECT PIN_MASK(PIN_USB_CONNECT_PIN) |
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#define PIN_USB_MODE GPIO_Mode_Out_PP |
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#define PIN_USB_CONNECT_ON() PIN_USB_CONNECT_PORT->BSRR = PIN_USB_CONNECT |
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#define PIN_USB_CONNECT_OFF() PIN_USB_CONNECT_PORT->BRR = PIN_USB_CONNECT |
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#endif |
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#if defined ( BOARD_V1 ) \ |
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|| defined ( BOARD_V1M ) |
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// SWDIO/TMS Pin |
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#define PIN_SWDIO_TMS_PORT GPIOA |
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#define PIN_SWDIO_TMS_PIN 2 |
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// SWCLK/TCK Pin |
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#define PIN_SWCLK_TCK_PORT GPIOA |
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#define PIN_SWCLK_TCK_PIN 4 |
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// TDO/SWO Pin (input) |
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#define PIN_TDO_PORT GPIOA |
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#define PIN_TDO 5 |
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// TDI Pin (output) |
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#define PIN_TDI_PORT GPIOA |
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#define PIN_TDI 7 |
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// nRESET Pin |
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#define PIN_nRESET_PORT GPIOA |
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#define PIN_nRESET_PIN 6 |
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#elif defined ( BOARD_V2 ) |
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// SWDIO/TMS Pin |
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#define PIN_SWDIO_TMS_PORT GPIOA |
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#define PIN_SWDIO_TMS_PIN 4 |
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// SWCLK/TCK Pin |
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#define PIN_SWCLK_TCK_PORT GPIOA |
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#define PIN_SWCLK_TCK_PIN 5 |
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// TDO/SWO Pin (input) |
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#define PIN_TDO_PORT GPIOA |
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#define PIN_TDO 6 |
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// TDI Pin (output) |
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#define PIN_TDI_PORT GPIOA |
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#define PIN_TDI 7 |
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// nRESET Pin |
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#define PIN_nRESET_PORT GPIOB |
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#define PIN_nRESET_PIN 9 |
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#elif defined ( STLINK_V20 ) \ |
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|| defined ( STLINK_V21 ) |
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// SWDIO/TMS Pin |
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#define PIN_SWDIO_TMS_PORT GPIOB |
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#define PIN_SWDIO_TMS_PIN 14 |
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// SWCLK/TCK Pin |
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#define PIN_SWCLK_TCK_PORT GPIOB |
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#define PIN_SWCLK_TCK_PIN 13 |
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// TDO/SWO Pin (input) |
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#define PIN_TDO_PORT GPIOA |
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#define PIN_TDO 6 |
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// nRESET Pin |
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#define PIN_nRESET_PORT GPIOB |
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#define PIN_nRESET_PIN 0 |
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#elif defined ( BOARD_STM32RF ) |
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// SWDIO/TMS Pin |
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#define PIN_SWDIO_TMS_PORT GPIOA |
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#define PIN_SWDIO_TMS_PIN 6 |
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// SWCLK/TCK Pin |
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#define PIN_SWCLK_TCK_PORT GPIOA |
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#define PIN_SWCLK_TCK_PIN 7 |
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// TDI Pin (output) |
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#define PIN_TDI_PORT GPIOA |
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#define PIN_TDI 8 |
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// nRESET Pin |
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#define PIN_nRESET_PORT GPIOB |
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#define PIN_nRESET_PIN 9 |
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#endif |
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// Debug Unit LEDs |
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#if defined ( BOARD_V1 ) || defined ( BOARD_V2 ) || defined ( BOARD_V1M ) |
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#define LED_CONNECTED_RCC RCC_APB2ENR_IOPBEN |
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// Connected LED (GREEN) |
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#define LED_CONNECTED_PORT GPIOB |
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#define LED_CONNECTED_PIN 8 |
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// Target Running LED (RED) |
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#define LED_RUNNING_PORT GPIOB |
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#define LED_RUNNING_PIN 12 |
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#elif defined ( STLINK_V20 ) |
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#define LED_CONNECTED_RCC RCC_APB2ENR_IOPAEN |
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// Connected LED (GREEN) 0 |
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// Target Running LED (RED) 1 |
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// Off - float |
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#define LED_CONNECTED_PORT GPIOA |
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#define LED_CONNECTED_PIN 9 |
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#define LED_RUNNING_PORT GPIOA |
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#define LED_RUNNING_PIN 9 |
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#elif defined ( STLINK_V21 ) |
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#define LED_CONNECTED_RCC RCC_APB2ENR_IOPAEN |
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// Connected LED (GREEN) 0 |
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// Target Running LED (RED) 1 |
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// Off - float |
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#define LED_CONNECTED_PORT GPIOA |
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#define LED_CONNECTED_PIN 9 |
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#define LED_RUNNING_PORT GPIOA |
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#define LED_RUNNING_PIN 8 |
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#define LED_CONNECTED PIN_MASK(LED_CONNECTED_PIN) |
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#define LED_RUNNING PIN_MASK(LED_RUNNING_PIN) |
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#elif defined ( BOARD_STM32RF ) |
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#define LED_CONNECTED_RCC RCC_APB2ENR_IOPBEN |
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// Connected LED (GREEN) |
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#define LED_CONNECTED_PORT GPIOB |
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#define LED_CONNECTED_PIN 11 |
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// Target Running LED (RED) |
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#define LED_RUNNING_PORT GPIOB |
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#define LED_RUNNING_PIN 12 |
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#endif |
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#define LED_CONNECTED PIN_MASK(LED_CONNECTED_PIN) |
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#define LED_RUNNING PIN_MASK(LED_RUNNING_PIN) |
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#define PIN_nRESET PIN_MASK(PIN_nRESET_PIN) |
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#define PIN_SWDIO_TMS PIN_MASK(PIN_SWDIO_TMS_PIN) |
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#define PIN_SWCLK_TCK PIN_MASK(PIN_SWCLK_TCK_PIN) |
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#if (PIN_nRESET_PIN >= 8) |
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#define PIN_nRESET_LOW() \ |
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do { \ |
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/* GPIO_Mode_Out_OD | GPIO_Speed_50MHz */ \ |
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PIN_nRESET_PORT->CRH = (PIN_nRESET_PORT->CRH & ~PIN_MODE_MASK(PIN_nRESET_PIN - 8)) \ |
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| PIN_MODE(((GPIO_Mode_Out_OD | GPIO_Speed_50MHz) & 0x0F), PIN_nRESET_PIN - 8); \ |
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} while (0) |
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#define PIN_nRESET_HIGH() \ |
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do { \ |
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PIN_nRESET_PORT->CRH = (PIN_nRESET_PORT->CRH & ~PIN_MODE_MASK(PIN_nRESET_PIN - 8)) \ |
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| PIN_MODE(GPIO_Mode_IN_FLOATING, PIN_nRESET_PIN - 8); \ |
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} while (0) |
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#else |
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#define PIN_nRESET_LOW() \ |
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do { \ |
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/* GPIO_Mode_Out_OD | GPIO_Speed_50MHz */ \ |
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PIN_nRESET_PORT->CRL = (PIN_nRESET_PORT->CRL & ~PIN_MODE_MASK(PIN_nRESET_PIN)) \ |
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| PIN_MODE(((GPIO_Mode_Out_OD | GPIO_Speed_50MHz) & 0x0F), PIN_nRESET_PIN); \ |
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} while (0) |
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#define PIN_nRESET_HIGH() \ |
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do { \ |
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PIN_nRESET_PORT->CRL = (PIN_nRESET_PORT->CRL & ~PIN_MODE_MASK(PIN_nRESET_PIN)) \ |
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| PIN_MODE(GPIO_Mode_IN_FLOATING, PIN_nRESET_PIN); \ |
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} while (0) |
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#endif |
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// For fast switch between input and output mode |
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// without GPIO_Init call |
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#if (PIN_SWDIO_TMS_PIN >= 8) |
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#define PIN_SWDIO_TMS_OUT_DISABLE() \ |
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do { \ |
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PIN_SWDIO_TMS_PORT->CRH = (PIN_SWDIO_TMS_PORT->CRH & ~PIN_MODE_MASK(PIN_SWDIO_TMS_PIN - 8)) | PIN_MODE(0x8, PIN_SWDIO_TMS_PIN - 8); \ |
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PIN_SWDIO_TMS_PORT->BSRR = PIN_SWDIO_TMS; \ |
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} while (0) |
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#define PIN_SWDIO_TMS_OUT_ENABLE() \ |
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do { \ |
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PIN_SWDIO_TMS_PORT->CRH = (PIN_SWDIO_TMS_PORT->CRH & ~PIN_MODE_MASK(PIN_SWDIO_TMS_PIN - 8)) | PIN_MODE(0x3, PIN_SWDIO_TMS_PIN - 8); \ |
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PIN_SWDIO_TMS_PORT->BRR = PIN_SWDIO_TMS; \ |
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} while (0) |
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#else |
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#define PIN_SWDIO_TMS_OUT_DISABLE() \ |
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do { \ |
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PIN_SWDIO_TMS_PORT->CRL = (PIN_SWDIO_TMS_PORT->CRL & ~PIN_MODE_MASK(PIN_SWDIO_TMS_PIN)) | PIN_MODE(0x8, PIN_SWDIO_TMS_PIN); \ |
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PIN_SWDIO_TMS_PORT->BSRR = PIN_SWDIO_TMS; \ |
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} while (0) |
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#define PIN_SWDIO_TMS_OUT_ENABLE() \ |
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do { \ |
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PIN_SWDIO_TMS_PORT->CRL = (PIN_SWDIO_TMS_PORT->CRL & ~PIN_MODE_MASK(PIN_SWDIO_TMS_PIN)) | PIN_MODE(0x3, PIN_SWDIO_TMS_PIN); \ |
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PIN_SWDIO_TMS_PORT->BRR = PIN_SWDIO_TMS; \ |
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} while (0) |
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#endif |
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void PORT_USB_CONNECT_SETUP(void); |
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void LEDS_SETUP (void); |
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//************************************************************************************************** |
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/** |
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\defgroup DAP_Config_PortIO_gr CMSIS-DAP Hardware I/O Pin Access |
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\ingroup DAP_ConfigIO_gr |
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@{ |
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|
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Standard I/O Pins of the CMSIS-DAP Hardware Debug Port support standard JTAG mode |
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and Serial Wire Debug (SWD) mode. In SWD mode only 2 pins are required to implement the debug |
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interface of a device. The following I/O Pins are provided: |
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|
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JTAG I/O Pin | SWD I/O Pin | CMSIS-DAP Hardware pin mode |
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---------------------------- | -------------------- | --------------------------------------------- |
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TCK: Test Clock | SWCLK: Clock | Output Push/Pull |
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TMS: Test Mode Select | SWDIO: Data I/O | Output Push/Pull; Input (for receiving data) |
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TDI: Test Data Input | | Output Push/Pull |
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TDO: Test Data Output | | Input |
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nTRST: Test Reset (optional) | | Output Open Drain with pull-up resistor |
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nRESET: Device Reset | nRESET: Device Reset | Output Open Drain with pull-up resistor |
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DAP Hardware I/O Pin Access Functions |
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------------------------------------- |
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The various I/O Pins are accessed by functions that implement the Read, Write, Set, or Clear to |
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these I/O Pins. |
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|
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For the SWDIO I/O Pin there are additional functions that are called in SWD I/O mode only. |
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This functions are provided to achieve faster I/O that is possible with some advanced GPIO |
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peripherals that can independently write/read a single I/O pin without affecting any other pins |
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of the same I/O port. The following SWDIO I/O Pin functions are provided: |
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- \ref PIN_SWDIO_OUT_ENABLE to enable the output mode from the DAP hardware. |
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- \ref PIN_SWDIO_OUT_DISABLE to enable the input mode to the DAP hardware. |
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- \ref PIN_SWDIO_IN to read from the SWDIO I/O pin with utmost possible speed. |
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- \ref PIN_SWDIO_OUT to write to the SWDIO I/O pin with utmost possible speed. |
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*/ |
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// Configure DAP I/O pins ------------------------------ |
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|
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void PORT_JTAG_SETUP(void); |
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void PORT_SWD_SETUP(void); |
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void PORT_OFF(void); |
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|
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/** Setup of the Debug Unit I/O pins and LEDs (called when Debug Unit is initialized). |
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This function performs the initialization of the CMSIS-DAP Hardware I/O Pins and the |
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Status LEDs. In detail the operation of Hardware I/O and LED pins are enabled and set: |
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- I/O clock system enabled. |
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- all I/O pins: input buffer enabled, output pins are set to HighZ mode. |
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- for nTRST, nRESET a weak pull-up (if available) is enabled. |
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- LED output pins are enabled and LEDs are turned off. |
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*/ |
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#define DAP_SETUP() PORT_OFF() |
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|
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// SWCLK/TCK I/O pin ------------------------------------- |
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|
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/** SWCLK/TCK I/O pin: Get Input. |
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\return Current status of the SWCLK/TCK DAP hardware I/O pin. |
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*/ |
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__STATIC_INLINE uint8_t PIN_SWCLK_TCK_IN(void) |
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{ |
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return (PIN_SWCLK_TCK_PORT->ODR & PIN_SWCLK_TCK) ? 1 : 0; |
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} |
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|
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/** SWCLK/TCK I/O pin: Set Output to High. |
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Set the SWCLK/TCK DAP hardware I/O pin to high level. |
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*/ |
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__STATIC_INLINE void PIN_SWCLK_TCK_SET(void) |
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{ |
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PIN_SWCLK_TCK_PORT->BSRR = PIN_SWCLK_TCK; |
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} |
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|
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/** SWCLK/TCK I/O pin: Set Output to Low. |
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Set the SWCLK/TCK DAP hardware I/O pin to low level. |
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*/ |
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__STATIC_INLINE void PIN_SWCLK_TCK_CLR (void) |
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{ |
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PIN_SWCLK_TCK_PORT->BRR = PIN_SWCLK_TCK; |
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} |
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|
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// SWDIO/TMS Pin I/O -------------------------------------- |
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|
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/** SWDIO/TMS I/O pin: Get Input. |
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\return Current status of the SWDIO/TMS DAP hardware I/O pin. |
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*/ |
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__STATIC_INLINE uint8_t PIN_SWDIO_TMS_IN(void) |
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{ |
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return (PIN_SWDIO_TMS_PORT->IDR & PIN_SWDIO_TMS) ? 1 : 0; |
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} |
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|
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/** SWDIO/TMS I/O pin: Set Output to High. |
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Set the SWDIO/TMS DAP hardware I/O pin to high level. |
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*/ |
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__STATIC_INLINE void PIN_SWDIO_TMS_SET(void) |
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{ |
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PIN_SWDIO_TMS_PORT->BSRR = PIN_SWDIO_TMS; |
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} |
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|
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/** SWDIO/TMS I/O pin: Set Output to Low. |
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Set the SWDIO/TMS DAP hardware I/O pin to low level. |
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*/ |
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__STATIC_INLINE void PIN_SWDIO_TMS_CLR(void) |
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{ |
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PIN_SWDIO_TMS_PORT->BRR = PIN_SWDIO_TMS; |
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} |
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|
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/** SWDIO I/O pin: Get Input (used in SWD mode only). |
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\return Current status of the SWDIO DAP hardware I/O pin. |
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*/ |
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__STATIC_INLINE uint8_t PIN_SWDIO_IN (void) |
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{ |
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if (PIN_SWDIO_TMS_PORT->IDR & PIN_SWDIO_TMS) |
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return 1; |
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return 0; |
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} |
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|
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/** SWDIO I/O pin: Set Output (used in SWD mode only). |
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\param bit Output value for the SWDIO DAP hardware I/O pin. |
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*/ |
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__STATIC_INLINE void PIN_SWDIO_OUT(uint8_t bit) |
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{ |
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if (bit & 1) |
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PIN_SWDIO_TMS_PORT->BSRR = PIN_SWDIO_TMS; |
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else |
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PIN_SWDIO_TMS_PORT->BRR = PIN_SWDIO_TMS; |
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} |
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|
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/** SWDIO I/O pin: Switch to Output mode (used in SWD mode only). |
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Configure the SWDIO DAP hardware I/O pin to output mode. This function is |
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called prior \ref PIN_SWDIO_OUT function calls. |
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*/ |
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__STATIC_INLINE void PIN_SWDIO_OUT_ENABLE(void) |
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{ |
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PIN_SWDIO_TMS_OUT_ENABLE(); |
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} |
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|
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/** SWDIO I/O pin: Switch to Input mode (used in SWD mode only). |
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Configure the SWDIO DAP hardware I/O pin to input mode. This function is |
|
called prior \ref PIN_SWDIO_IN function calls. |
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*/ |
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__STATIC_INLINE void PIN_SWDIO_OUT_DISABLE(void) |
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{ |
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PIN_SWDIO_TMS_OUT_DISABLE(); |
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} |
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|
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// TDI Pin I/O --------------------------------------------- |
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#if ( DAP_JTAG != 0 ) |
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/** TDI I/O pin: Get Input. |
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\return Current status of the TDI DAP hardware I/O pin. |
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*/ |
|
__STATIC_INLINE uint8_t PIN_TDI_IN(void) |
|
{ |
|
return (PIN_TDI_PORT->ODR & PIN_TDI) ? 1 : 0; |
|
} |
|
|
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/** TDI I/O pin: Set Output. |
|
\param bit Output value for the TDI DAP hardware I/O pin. |
|
*/ |
|
__STATIC_INLINE void PIN_TDI_OUT(uint8_t bit) |
|
{ |
|
if (bit & 1) |
|
PIN_TDI_PORT->BSRR = PIN_TDI; |
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else |
|
PIN_TDI_PORT->BRR = PIN_TDI; |
|
} |
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|
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|
|
// TDO Pin I/O --------------------------------------------- |
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|
|
/** TDO I/O pin: Get Input. |
|
\return Current status of the TDO DAP hardware I/O pin. |
|
*/ |
|
__STATIC_INLINE uint8_t PIN_TDO_IN(void) |
|
{ |
|
return (PIN_TDO_PORT->IDR & PIN_TDO) ? 1 : 0; |
|
} |
|
#endif |
|
|
|
// nTRST Pin I/O ------------------------------------------- |
|
|
|
/** nTRST I/O pin: Get Input. |
|
\return Current status of the nTRST DAP hardware I/O pin. |
|
*/ |
|
__STATIC_INLINE uint8_t PIN_nTRST_IN(void) |
|
{ |
|
return (0); // Not available |
|
} |
|
|
|
/** nTRST I/O pin: Set Output. |
|
\param bit JTAG TRST Test Reset pin status: |
|
- 0: issue a JTAG TRST Test Reset. |
|
- 1: release JTAG TRST Test Reset. |
|
*/ |
|
__STATIC_INLINE void PIN_nTRST_OUT(uint8_t bit) |
|
{ |
|
|
|
} |
|
|
|
// nRESET Pin I/O------------------------------------------ |
|
|
|
/** nRESET I/O pin: Get Input. |
|
\return Current status of the nRESET DAP hardware I/O pin. |
|
*/ |
|
__STATIC_INLINE uint8_t PIN_nRESET_IN(void) |
|
{ |
|
if (PIN_nRESET_PORT->IDR & PIN_nRESET) |
|
return 1; |
|
return 0; |
|
} |
|
|
|
/** nRESET I/O pin: Set Output. |
|
\param bit target device hardware reset pin status: |
|
- 0: issue a device hardware reset. |
|
- 1: release device hardware reset. |
|
*/ |
|
void PIN_nRESET_OUT(uint8_t bit); |
|
|
|
///@} |
|
|
|
//************************************************************************************************** |
|
/** |
|
\defgroup DAP_Config_LEDs_gr CMSIS-DAP Hardware Status LEDs |
|
\ingroup DAP_ConfigIO_gr |
|
@{ |
|
|
|
CMSIS-DAP Hardware may provide LEDs that indicate the status of the CMSIS-DAP Debug Unit. |
|
|
|
It is recommended to provide the following LEDs for status indication: |
|
- Connect LED: is active when the DAP hardware is connected to a debugger. |
|
- Running LED: is active when the debugger has put the target device into running state. |
|
*/ |
|
|
|
/** Debug Unit: Set status of Connected LED. |
|
\param bit status of the Connect LED. |
|
- 1: Connect LED ON: debugger is connected to CMSIS-DAP Debug Unit. |
|
- 0: Connect LED OFF: debugger is not connected to CMSIS-DAP Debug Unit. |
|
*/ |
|
#define LED_CONNECTED_OUT(b) pCoreDescriptor->LedConnected(b) |
|
|
|
/** Debug Unit: Set status Target Running LED. |
|
\param bit status of the Target Running LED. |
|
- 1: Target Running LED ON: program execution in target started. |
|
- 0: Target Running LED OFF: program execution in target stopped. |
|
*/ |
|
#define LED_RUNNING_OUT(b) pCoreDescriptor->LedRunning(b) |
|
|
|
///@} |
|
|
|
|
|
//************************************************************************************************** |
|
/** |
|
\defgroup DAP_Config_Initialization_gr CMSIS-DAP Initialization |
|
\ingroup DAP_ConfigIO_gr |
|
@{ |
|
|
|
CMSIS-DAP Hardware I/O and LED Pins are initialized with the function \ref DAP_SETUP. |
|
*/ |
|
|
|
/** Reset Target Device with custom specific I/O pin or command sequence. |
|
This function allows the optional implementation of a device specific reset sequence. |
|
It is called when the command \ref DAP_ResetTarget and is for example required |
|
when a device needs a time-critical unlock sequence that enables the debug port. |
|
\return 0 = no device specific reset sequence is implemented.\n |
|
1 = a device specific reset sequence is implemented. |
|
*/ |
|
__STATIC_INLINE uint8_t RESET_TARGET(void) |
|
{ |
|
return (0); // change to '1' when a device reset sequence is implemented |
|
} |
|
|
|
///@} |
|
|
|
|
|
#endif /* __DAP_CONFIG_H__ */
|
|
|